1. Field of the Invention
The invention relates to a method of fabricating bit lines, and more particularly to a method of fabricating bit lines by damascene.
2. Description of the Related Art
FIGS. 1A-1D shows a fabricating method of bit lines in prior art. Referring to FIG. 1A. an oxide layer 102 is formed on the substrate 100 and the oxide layer 102 is patterned by photolithography to form a bit line contact window 104. A polysilicon layer 106 and a tungsten silicide layer (WSi.sub.x) 108 are formed successively on the substrate 100 to fill the bit line contact window 104, as shown in FIG. 1B. The steps of exposure, development and etching are performed to define the polysilicon layer 106 and the tungsten silicide layer 108 to form a bit line including bit line contacts 110 and interconnects 112 which connect each of the bit line contacts 110, as shown in FIG. 1C. An oxide layer 114 is deposited over the substrate 100, as shown in FIG. 1D, and a node contact window (not shown) is then subsequently defined.
FIG. 2 is a top view of FIG. 1D. Generally, in order to increase the alignment space of the node contact 200 and avoid to contact with the bit line 110b on the bit line contact 110a, the critical dimension (CD) of the interconnect 112 of bit line 204 is narrower. The width of the interconnect 112 should be narrowed as the size of the device is reduced. It is difficult to perform a exposure process to achieve the requirement of reduced width of interconnect 112. The alignment space between the interconnects 112 for the node contact 200 is not large enough to form the node contact 200. If the node contact 200 is misaligned, it maybe contact with the interconnects 112 to cause shorts between the node contact 200 and the interconnects 112.